Hi dear Analog!
Where can I find an analog input resistance of AD9650?
And why have you stop to support parts of a S-parameters? They were very usefull !
p.s. exuse me my bad English
We are gathering the data, should have it for you soon.
I also need the s-parameter file for the AD9650-105. Can you please post if available?
I am attaching the S parameters for the AD9650, they are the same for all speed grades.
Hi, David! Thank you very much!
But I have some questions for you! Here they are:
1. How much will be difference between mathematical and real parameters?
2. Why imaginary part of input Z is negative?
3. Can I use following formulas for parallel representation of ADC input Z:
You've use such formulas for previous parts (AD9265 for example). In such way I've came to 1.5 kOhm and -392 pF at 130 MHz ! Where am I wrong?
The mathematical representation will give you the correct numbers.
You can ignore the negative sign. It is just there to tell you it is capacitive.
The formulas to use are in the spreadsheet attached for the AD9650.
Sorry for my stupidity, but I have another quastion! )
Using your data and the formulas from the spreadsheet I got a 10 pF equivalent parallel capacitance of ADC analog input. While AD9650 datasheet tell us that capacitance between any one differential pin and AGND is equal to 11 pF - that is the same as 5.5 pF between differential pins... Where is my mistake?
Thanks for your help!
I'm glad you brought up the effective capacitance. If the effective capacitance is incorrect then my current front-end network has to recalculated. I would like to know if the datasheet has a typo because the s-parameter file it points and the plots look like a probable S11 response. However I do have a another question. I am attempting to understand ane calculate the correct input drive level for the AD9650.
In the file you included the complex impedance in columns E and F then derived the parallel capacitance but not the parallel resistance? This is OK, I added a column for the resistance. Is this correct? The file is attached.
My second question is determining the input drive level for the ADC input impedance at my operating frequency. If the ADC max input level is 2.7Vpp, then
Vp = Vpp/2 = 1.35V
Vrms = Vp*0.7071=0.9546V
Pwr(mW) = [Vrms^2 / abs(Z)] * 10^3 = 3.4387mW, where the ADC input network at my operating frequency of 60MHz is
6.1718kohm || 10pF or 11.4ohms -j265. abs of (11.4ohms - j265) = 265 ohms
This in log relative to 1mW is = +5.3939dBm
Thus the maximum power into the ADC is +5.3939dBm at 60MHz for an impedance of 265ohms.
Is this correct, do I have the impedance incorrect?
Thank you in advance for you help.
Yes, this math is correct.
However, this is the signal power at the ADC pins for this frequency.
Other losses and impedance changes will occur when you design the frontend.
No mistake on your part. Good catch.
We need to update the datasheet.
10pF is correct.
Thank you for your response.
I downloaded the ADIsimRF tool and I'm attempting to verify the input drive level into the AD9650 using ADIsimRF. I am having difficulty understanding the impedance values to put my last 3 stages. The last 3 stages are the transformer/balun, match network and ADC stages. Attached is a pic below of what I got so far.
Since the ADC Rpar || Cpar results in a complex of 11.403ohm –j265.044, and the absolute of that is 265 ohms then I think I should use 265 ohms for the Zin and Zout for the ADC. Is this correct?
Secondly the "MATCH" model. Is this used to help designers properly match the ADC? Therefore for that network I should use Zout of 265ohms and Zin of 185 ohms. The 185 ohms I got after creating and calculating my front-end network based in the values for Rpar and Cpar. Calculating up the tranformer sec I get 185 ohms. My matching network is below.
So I used 185 ohms for Zin of the MATCH? Is this correct?
Thank you very much for your help.
Retrieving data ...