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AD5420AREZ Latch-Up During 4 KV Electrical Fast Transient Testing

Question asked by Tom@Beck on Mar 20, 2013
Latest reply on Apr 19, 2013 by Tom@Beck

AD5420AREZ Latch-Up During 4 KV Electrical Fast Transient Testing

We are first-article testing new design for release to production. The design is a PCB assembly with the AD5420 as the 4-20mA feedback output module. During IEC 1000-4-4 -- Electrical Fast Transient Testing, the AD5420 digital interface latches up with a full power cycle required to restore the device to normal operation.  All digital communications with the AD5420 stop-- either the chip  locks up the SPI interface or does not responding to SPI commands.

The test setup is follows: The output of the AD5420 PCB is connected to a shielded twisted pair cable approximately 3 feet in length. The shield is directly bonded to the ground case of the Device Under Test. The opposite end of the cable is connected to a 250 Ohm resistor. The cable is placed into a KeyTek Model CCL Capacitive Clamp. The EFT waveform is imposed on the clamp using a Thermo KeyTek EMCPro. A peak voltage of 4000V with a EFT repetition rate of 2.5 KHz is where the latch up occurs (Class 4 EFT).

Also, when our existing AD420 design is EFT tested with the same setup, there is no problem with latch up. We have repeated the test 10 times (before giving up) on our AD420-based product with no problems noted.

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