AnsweredAssumed Answered

FPGA gets write ACK, and no read ACK from ADV7180

Question asked by Lawee on Mar 20, 2013
Latest reply on Mar 25, 2013 by DaveD

Hi Sir

when I use FPGA to configure ADV7180, get the problem :

there is write ACK from ADV7180, but no read ACK from it.

 

so, could you give me some suggestion to debug this problem? thanks

 

WRITE and READ is to confirm the register being configured successfully

 

the procedure is :

1)

start

2)

addressing slave_addr(0x40) with write command

3)

addressing sub_addr(0x00)

4)

drive out write data

[here, step2~4 there is each ACK]

5)

stop

 

wait for about 6us

 

6)

start

7)

addressing slave_addr(0x41) with read command

8)

addressing sub_addr(0x00)

9)

waiting for read data

[here, step7~8 there is not any ACK]

10)

stop

Outcomes