I am using AD974 analog to digital converter,giving an external discontinuous data clock (16 clock pulses for each conversion) but I am receiving data corresponding to only 8 clock pulses.Can anyone tell me what to do to get 16 bit data?
I moved this question about the AD974 to the Precision ADCs Community. Someone here should be able to assist you.
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It would be helpful if you can share your schematic and scope timging screenshots showing EXT DATACLK, R//C, /BUSY, SYNC and DATA together in order to understand what's causing the issue? What throughput rate are you using?
The AD974 is an old product, I could recommend one of the newer products if you tell us where do you plan to use the AD974?
I am attaching screenshot showing the external clock (in channel 1,clock is asynchronous), the read/convert (in channel 2) and the data (in channel 3) corresponding to a potentiometer (connected to the first channel of the adc). The potentiometer is at 5V. The busy signal is coming low but for a very small fraction of time. I am attaching the code as well as my adc schematic.
sbit a0=P0^0; //ad974 A0
sbit a1=P0^1; //ad974 A1
sbit rc=P0^4; //Read/convert
sbit clk=P0^5; //external clock
sbit dat=P0^6; // adc data pin
sbit busy=P0^7; //adc BUSY pin
a0=0; // to use channel 1
void delay(unsigned int itime)
Can anyone plz help with this?
I suspect the issue has to do with your AD974 test set up.
From your schematic, looks like you have not placed enough decoupling on the supply and REF pins. Decoupling capacitors, typically 0.1µF, should be placed close to the power supply pins of the AD974 to minimize any inductance between the capacitors and the VANA and VDIG pins. Additionally, 2.2µF to 10µF capacitors should be located in the vicinity of the ADC to further reduce low frequency ripple. You should also place recommended 2.2µF tantalum capacitors between the REF and CAP pins and analog ground as shwon in the Figure 12. Are you connecting the VCC to 5V? It looks like you'd like to use the 2nd configuration (0-+5V) from the figure 11? Then you will need to connect V1B to AGND1 rather than Vcc as you have done in the schematic. What throughput rate are you using?
It's also not clear if you are trying to access the previous conversion result during a conversion (Figures 5, 7 and 9) or access the conversion result after the completion of a conversion (Figures 4, 6 and 8). Note that with R/C LOW, a falling edge on CS will initiate a conversion and with R/C HIGH, a falling edge on CS will enable the serial data output sequence. Make sure that you also follow the timing specifications specified on the page 3.
I have placed the capacitors as suggested by you. Yes,I am using the 0-5 V input range and m trying to read data after the conversion.What I am trying to do is-convert and then read the data and then convert and read and so on. I am using a discontinuous clock signal i.e the clock is generated only after the conversion is done.But still, I am not able to read 16 bit data.At present I am giving a lot of delay between my pulses(you can see in the code),so my throughput should be very low.But once i am able to read 16 bit data,I plan to reduce the delay.
I basically need to convert analog signal with high accuracy and speed and then send in on serial transmission.
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