I have some questions for you.
Can you AD9889B output DVI signal if I input with the enclosed signal timing?
The enclosed is brought from SMPTE296M 720p/30 or 25Hz, YUV422 16bit, 74.25MHz pixcel clock.
Because we will put the input ID(address 0x15)=Embedded Syncs(SAV and EAV).
So in the case of 720p/30Hz, we need 11 bit for the bit width of Hsync Placement setting(address0x30, 0x31[7:6] total 10bit).
If we cannot input the Embedded Syncs with 720p/30Hz, then we can output due to that we change to put Separate Sync, and input DE signal separately. Is this correct?
I have found this "Not recommend for new development" I understand.
But please reply the answer my questions.
We will finish our development design soon.