I have a customer that is looking to utilize the AD9142 within an encoder design that will interface directly to an FPGA.
The customer would like to know the maximum frequency of the DCI (fDCI/LVDS clock) input?
I checked the AD9142 Datasheet and cannot determine the maximum frequency permitted by the DCI input (provides min/max values for
electrical chars, but not fDCI).
Thanks in advance for your help.