Our customer, T.W., asks: We are using the AD9547 to generate a 35.84MHz output clock that is locked to GPS. We have a 20MHz crystal to supply the clock frequency. The GPS unit can supply just about any multiple of 1PPS we want. For now, we are using a 1MHz signal from a signal generator and just trying to get the AD9547 to lock to it. We are able to load the device and see the 35.84MHz output. The system clock multiplier is locked. The problem is the DPLL is not locked. When we look at the DPLL status register, it says the part is free running. We have tried disabling the verification function on the reference input to see if that helps, but it doesn't. We're not sure how to get it out of the free running mode and into locked mode.