I implemented the above procedure for AD7193 in my code with the operating conditions as follows: channels AIN0 to AIN4 in Pseudo mode, Internal 4.92MHz clock, pin MCLK2 tristated, Gain=1, buffer on, unipolar mode, external reference applied between REFIN1(+) and REFIN1(-).
My procedure algorithm is as below:
Write to mode register and then to configuration register //Initialization part; executed just once
Read the data register of ADC
Write to configuration register to select next channel
*above function runs every 4msec (with the help of a timer interrupt).
What I observed is I have to maintain some delay between writing the configuration register to select next channel and reading the data register of ADC. This delay is roughly around 3msec. (Hence I chose the timer value to be 4msec.) Values I am getting for the respective channels are correct.
My question here is whether this delay needed? Are there any hardware limitations on ADC because of which it needs certain time between configuring the ADC and reading it? Are there any ways to reduce this delay?