I have a design which is a simple image sensor pipeline in an FPGA. The video source image sensor working in 1080p 30fps. The video sink is HDMI codec ADV7511.
Although image sensor provide video at 30fps, but the monitor can not display 30fps. So the ADV7511 needs to output 1080P video in 60fps. This means I need to double the frame, like display the same frame twice.
I consider this issue for a while. Making the design to achieve the double frame in FPGA looks like not an easy task. So I just wonder is anybody has done the similar design before to achieve the double frame rate? Is there any good approach?
Thanks very much.