what is the minimum REF CLK frequency of external clock source? (internal PLL in AD9915 enabled). I need to achieve SYSCLK = 2500MHz.
The REF CLK multiplier PLL on the AD9915 can mulltiply the input frequency by up to 255, so the minimum input to acheive a 2500 MHz sample clock would be (2500/255) MHZ, or a little under 10 MHz.
Keep in mind that using the onboard PLL will limit the performance you can acheive on the output.
Moving this question on AD9915 to the DDS Community.
I want to drive AD9915 or AD9914 with externally crystal like being Ad9910. You know Ad9910 can be driven with a 25MHz external crystal and the crystal come with on eval board. As AD9910, I want to drive AD9914/15 with lower clock frequency under 2.5/3.5 GHz such as 25 MHz crystal. AD9914 and Ad9915 has the same max systam clock freq when using PLL so Ad9915 is more logical than using AD9914 due to price. Is it possible to drive AD9915 with an external crystal has lower clock frequency?
Unfortunately, the AD9914/5 input circuitry was not designed to support a simple crystal as the reference source.
Thanks for your quick reply. Well, are there and DDS IC of Analog Devices runs over 1GHz?
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