Hi, I am using BF609 EZ-Kit, and trying to use L2 cache as schared memory,which can be read and write by both cores,how should I programm it, and what registers should I config, is there any examples?
Only L1 memory on the BF609 can be used as cache. L2 memory can be used for data or instructions which can then be cached in L1 data or instruction memory. I assume from your question that you want to use L2 as a shared memory. CrossCore Embedded Studio includes an implementation of the MCAPI protocol which may help depending on what you are attempting to do with the shared memory.
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