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SPI "modulo buffer" realization

Question asked by ChristianH on Feb 19, 2013
Latest reply on Feb 20, 2013 by ChristianH



I use the ADSP-21469 SPI interface to communicate with a µC. I have to send or receive a huge amount of 16 Bit values.

My idea was to use e.g. an 8k buffer where I save blocks of 1k data as soon as received to a flash memory (SPIB) (the other way when transmitting).

I thought of using a DMA transfer from SPI to the 8k buffer in a modulo mode (data is >8k) but there is no possibility to enable such a mode.

Because of that I'm thinking of using a chained DMA that starts again at the beginning of the buffer when the end is reached.


The part I'm not sure is if a seamless transfer to the µC (he is the SPI master) can be guaranted i.e. the µC don't needs to wait for the DSP but continously clocks the data in or out.

I'm wondering if the DMA (chaining mode) would be re-configured fast enough before the next word is requested by the SPI interface.

The SPI runs on maximum speed i.e. 55MHz.


Can anybody give me some ideas what I need to consider or the simple answer I do not see at the moment?