I'm planning to use the AD9255 for digitizing a low frequency signal overlain by a fast, low voltage step signal at about 50MSPS. So its a time domain application.
In the datasheet there are multiple examples for clocking the adc. But I can't see the pros/cons for the options.
Since the ADC will probably supply my FPGA with the clock (I wanted to use the sample clock output for that) it is the only component driven by an oscillator. The recommended clocking option for frequencies below 200MHz would be the Mini Circuits transformer or an AD95XX. I want to keep the noise low but also am somewhat limited in board space. Thats why I wonder if mine is one of the mysterious applications where "...it may be acceptable to drive the sample clock inputs with a single-ended CMOS signal." (p. 30)
So my question would be, what are the cons when I c-couple my CMOS oscillator to the adc. Would you recommend other methods?