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optimizing the link/loader file to permit debug code in a SHARC design

Question asked by frankd on Feb 12, 2013
Latest reply on Feb 14, 2013 by CraigG


My customer has a design that compiles fine in RELEASE mode, but has problems with finding enough on board memory for debug mode. I’m sure I have vectors and other stuff I can redirect to off chip memory, but need a quick assist in navigating the linker file to direct process.  Is there a way to configure the linker for what my customer is trying to do?  My customer is using Visual DSP++ with the Sharc ADSP-21469.

THank you,