I stumbled across two oddities in the evaluation software:
Amplitude sweep rates mixed up and the system clock multiplier.
For some reason the Rising Sweep Ramp Rate and Falling Sweep Ramp Rate for the Amplitude Sweep Mode seem to be mixed up.
As seen in the picture above, the Rising Rate is 11 ns and the Falling rate is 100 ns. However, the signal at the DAC OUT looks like this:
The rising rate is certainly greater than 11 ns.
Obviously the rising rate is 100 ns, and the falling rate is 11 ns. Can somebody confirm this?
To my understanding, the integrated PLL can operate with multipliers from 8...255 times the External Clock reference. The integrated VCO operates from 2.4 Ghz to 2.5 GHz.
I used a 64 MHz reference and set the multiplier to 39 in order to get a system clock of 2496. However, the software displays a value of 2432 MHz for multipliers of 38 and 39.
In fact, it seems that this is true for all odd multipliers and their preceding even multiplier (8 and 9, 10 and 11, ..., 254 and 255). Is this intended?