We purchased a FMC230 board from 4DSP which has two AD9129 DACs. I am trying to sync the two DACs from a Virtex-7 evaluation board (VC707)
From my interpretation of the AD9129 datasheet, for multi-DAC synchronization, the read pointer value of each DAC can be read back by reading bits [6:4] of register 0x12 after the two DACs have been given a FRAME signal. However, I am reading back the same value as I configured (0x2) for both the DACs every time.
The FRAME signal I am generating is asserted for one DCI clock cycle which should also initialize the FIFOs. Am I doing something wrong? Any help would be greatly appreciated.