Hi everyone, I'm working on a board that use 2 AD9250 and two DACs, similar to FMC176. I have also an RF front end that run at 150Mhz, all the ICs in the board run at 150Mhz .
I want to use the reference design for VC707, and i did the following:
1- Regenerate the jesd204b_rx4.xco with coregen
2- On the folder jesd204b_rx4/example_design, I tried to regenerate the jesd204b_rx4_gtwizard_v2_1.xco, to version 2_2 but I can't.
3- Following the jesd204b_v2_2 pcore pdf, I create a new GT transceiver with the JESD204 Protocol using the v2.2 wizard, the component name is : jesd204b_rx4_gtwizard_v2_1
Ref_clk=150Mhz ; Rate=3Gbps, TX= off ; Refclk1; QPLL; drp 100mhz, RXCHARISCOMMA; RXUSRCLK=TXOUTCLK; RXPCSRESET; RX COMMA= K28.5; RX equalization= auto
By default the protocol JESD204 do not use channel bounding, so the top GT file : jesd204b_rx4_gtwizard_v2_1_top.v, has ports that are not defined on the GT wrapper.
How I can work at a different ADC frequency ? How I must configure the GTX?