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Question asked by aswain571 on Feb 5, 2013
Latest reply on Feb 13, 2013 by UmeshJ

I have a new design that will be using the AD9467 and would like clarification  about data I found in the digital specification of the datasheet for the SPI  bus.


Revision C page 6 of 32 “LOGIC INPUTS(SCLK, CSB, SDIO)” states that Logic 0  Voltage can only be a maximum of 0.3 volts.  Is this correct?  I would expect  this to be slightly higher voltage.  The VO-low max of FPGA’s are normally 0.4 volts.