In ADuCM360 Silicon anomaly, it shows that "ADC Gain = 1, ADC Input Buffers Enabled: The ADC data output accuracy is not linear and does not meet the ADC specifications when the ADC input buffers are enabled."
Is there more information/plot available showing this INL? In particular, when the inputs are large, say over half of the FSR, what is the non-linearity? Just want to know how bad it could be if I use this ADC (Gain = 1and buffers ON) when the inputs are over half of the FSR.
Any information regarding this is appreciated!