I have some problems getting some ADF4351s to lock at some frequencies. I have tried with four devices. Two of these seem to work properly, one exhibit the issue only sometimes and very rarely, one shows the issue very often.
It seems that, when I write the configuration, the ADF4351 chooses the wrong VCO band. On one device I have to resend configuration several times before it gains lock.
"Worst case" configuration is:
- 25MHz reference frequency, 1GHz output, 8/9 prescaler, feedback on fundamental, phase adjust off, phase value 1
- Low Spur mode, MUXOUT on analog lock detect, double buffering enabled, CP current 2.5mA, LDF frac-N, LDP 10ns, PD polarity positive, PD disabled, CP 3-state disabled, counter reset Disabled;
- Band select clock mode low, charge cancellation disabled, clock divider off, ABP 6ns, CSR disabled;
- LD pin on Digital Lock detect;
- VCO powerdown disabled, MTLD enabled, AUX out disabled, RF output enabled at -4dBm, band select clock divider = 200;
By turning MTLD OFF, when chip doesn't lock I can see an output slightly higher respect to the desired frequency (e.g. 1.019 or 1.034 GHz), and the VCO voltage is very low.
Same thing if I set output to 2GHz.
I have also tried with 1.012GHz, same result, but a lower "failure rate" (registers as before, except for: R0: 0x005080B8 and R1: 0x080080C9).
So I suspect the chip chooses the wrong VCO band, but I don't know why.
The order I write registers is from 5 to 0.
External control loop components are those of ADF4351 evaluation board.