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problem with ADV7612BSWZ-P(HDMI-RX)

Question asked by shashank on Jan 24, 2013
Latest reply on Jan 25, 2013 by GuenterL

hello,

     I designed a custom hardware with ADV7612BSWZ-P(HDMI-RX) and ADV7511WBSWZ(HDMI-TX) using Xilinx Virtex5 FPGA.

I am able to run  ADV7511W with ADV7612 as loopback fashion  in 1080p YCbCr 4:2:2 mode with internal pattern generator of CP when no HDIM input.

 

But when I connect laptop output as HDMI input to ADV7612, i did not get proper hsync,vsync,data_enable,llc_clock_output.

I did not understand where is the problem.

I follow those script for register setting using I2C interface.

1:- reset script

2:- 6-1f script in ADV7612-VER.2.9c.txt

3:- ADV7612 12 bit EDID setting.

I did some changes in 6-1f script according to YCBCr 4:2:2 mode.

any changes required for EDID?

Please give me some suggestion or help.


Thanks and regards,

Shashank Chaurasia

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