Please check the attached image.
It shows the AD9970 SPI interface waveform.
Please let me know if it looks right.
It seems OK- bits are latched on SCK rising edges, starting with 12-bits for address then 28-bits for data. Address and Data are both LSB first. SL is held LOW during the operation.
It's not necessary to toggle SL for every register write- you can use the timing in figure 66 of the data sheet. Only the first address is loaded, followed by multiple 28-bit data writes. The data writes will be loaded into sequential register addresses automatically.
Should I toggle the SL signal to update each register?
Retrieving data ...