# Operating @ 192Khz. ADC resistor, PLL pins and Core Reg ?

Question asked by Nando.One on Jan 17, 2013
Latest reply on Jan 17, 2013 by BrettG

According to the datasheet, for the ADC voltage-to-current input resistor, the following formula applies:

Rtotal = 20K * (48Khz / FsNew),

which originally for 48Khz Fs = 20K - 2K (internal resistor) we have the suggested 18K voltage-to-current resistor.

Ok, so for 192Khz: Rtotal = 20K * (48 / 192) = 5K. Then 5K - 2K and the voltage-to-current resistor should be 3K.

Strangely, although I was operating at 192Khz, I've got a very bad clipping sound using the 3K resistors. When I swtiched back to 18k resistors, everything seemed to be fine again. No, the input level is not too high. That was my iPhone with 1/5 of the volume.

The 192Khz Fs was set uniquely by setting the DSP Core Register to 4x (256 instructions) in SigmaStudio, as follows:

Param Name:  IC 1.CoreRegister

Param Data: 0x00,     0x1E

On my board, I have a jumper to set the pin 39 (PLL_MODE_1) to +3v3 or to GND. Pin 38 (PLL_MODE_0) is permanently tied to GND. According to table 12 of the datasheet, both pins must be tied to GND in order to operate @ 192Khz with a 12.288Mhz Xtal, as 12.288 / 64 = 192Khz. Strangely again, if I do that I can only hear noise, but if I set PLL_MODE_1 to VDD, it works normally.

I'm under the impression that it is working @ 48Khz, but the algorithms are all calculated to work @ 192Khz and they're working properly, which makes me believe that it IS indeed operating @ 192Khz.

I'm pretty confused. I'm afraid that if these pin configurations and voltage-to-current resistors aren't properly set, I'm subjected to phase shiftings and stuff like that. Apparently it's working fine, but I don't have readily available a proper measure equipment to make a sweep and check.

Thanks a lot!

Best,

Fernando P.