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AD9467-FMC-250EBZ Reference Design on ML605

Question asked by curry@bridgerphotonics.com on Jan 9, 2013
Latest reply on May 17, 2017 by ccruztorre

Hi,

 

I recently purchased an AD9467-FMC-250EBZ and I am attempting to test the reference design for this board on my ML605. I am following the instructions located at: http://wiki.analog.com/resources/fpga/xilinx/fmc/ad9467

 

I have connected a clock source; I'm using a 60 MHz sine wave, 1V peak-peak. Is this right? I can't find requirements for the clock into this board. I have connected a data source (currently a 1 MHz sine wave, 100 mV peak-peak). The AD9467-FMC-250EBZ is on the FMC LPC connector. I have the board powered and USB connections to the JTAG and UART connectors.

 

When I program the pre-built cf_ad9467.bit file using iMPACT, I get the following output on the UART:

 

Analog Devices, AD9467-FMC

AD9467[0x001]: 50

AD9467[0x002]: 20

AD9517[0x003]: D3

AD9517[0x1e1]: 01

AD9517[0x197]: 80

AD9517[0x198]: 02

AD9517[0x0f5]: 0C

AD9517[0x232]: 00

AD9467[0x016]: 00

AD9467[0x016]: 80

adc_setup: can not set a zero error delay!

adc_test(): mode( 1), format( 0)

 

 

The adc_setup() function is failing. Closer inspection of the C source code reveals that the failure actually happens in the adc_delay() function, most likely due to an error in the register located at 0x14 in the ADC interface IP. This, according to regmap.txt, would indicate either "PN Error", "PN Out of Sync" or "Over Range" error states, but the UART output does not indicate which. "Over Range" seems unlikely given my 100 mVpp input.

 

What am I doing wrong here? Thanks!

 

 

Jim

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