I am new to using ADCs. I have 3 different kinds of signals which I need to sample and process. The frequencies are 1KHz, 10KHz & 100 Khz, and all are single-ended. I want around 100 samples per cycle, with about 12-14 bit accuracy. So I have chosen AD7626 (16-bit) with 10MHz sampling rate. When I sample the highest frequency signal (100KHz), I will run the ADC with 10MHz clock, and when I receive the other signals, I will bring down the sampling rate by a factor of 10 & 100 accordingly. How is the idea?
In addition, I want to use the ADA4932 for driving the AD7626 rather than ADA4899. In CN-0105, it is mentioned that ADA4899 is the recommended driver at lower frequencies. I want to know what are the issues with ADA4932 at lower frequencies (1KHz - 100KHz). I like ADA4932 since it is a single chip solution. If it is input referred noise, I am okay with it, since some amount of noise is not much of an issue with me.
I have a third query. It will be difficult for me to generate +7.25V required for the +Vs power of ADA4932. So I am planning to use +5V instead. I want to know what is the effect of this. Will it just bring down the dynamic range of the output. I can take care of that by reducing the input swing.
thanks and regards,