Has anyone had success making the AD9913 ramp down in frequency while in edge triggered mode with the no dwell bit active? The data sheet indicates that the part can perform this ramp but I can't make my design or the evaluation board execute it.
Thank you for your patience.
Setting the Auxiliary Accumulator Enable bit = 1 means you are enabling the digital ramp generator.
I have tried again in the lab using the evaluation board of AD9913. In order to program the device to jump to E0 instead of S0, you might want to try the following:
Hope this helps.
Sorry it's late for a reply.
Looking at the datasheet and relating it to the eval software, kindly ensure you have the following settings:
The diagram that you referred to in the datasheet as shown in the figure below uses external profile pins as sweep control. In the eval software, this is the default setting. That is, Use Internal Profile CFR1 bit is 0. If you want to control the sweep by the registers (CFR1[22:20]), set CFR1=1.
In the eval software, the external profile pin is the default sweep control. So based on the diagram shown, If you have a value in endpoint E0 (frequency 1) and a value in starting point S0 (frequency 0), the ramp down will perform according to the rising edge of your PS. The ramp starts at E0 sweeps to S0 then reverts to initial state E0. PS is pin no. 3 of AD9913. In the eval board, you can find external control for PS at the I/O header.
Thank you for the detailed response. I should have mentioned in my original post that I am able to get the AD9913 to execute the ramp-up in frequency while in edge-triggered mode with no-dwell = 1. This works consistently both in my design and with the evaluation board. It is the down-ramp sweep that is proving to be a challenge.
For the AD9913 evaluation board, I have noticed that the output frequency of the AD9913 jumps to the value of S0 when the Auxiliary Accumulator Enable bit is set. This is fine for the ramp-up case because S0 is the correct starting frequency and it is the correct "idle" frequency for edge-triggered, no-dwell = 1 operation. This is not fine for the ramp-down case because S0 is the sweep termination frequency. Triggering on the PS1 line will not make the device execute the ramp-down sweep when edge-triggered, no-dwell = 1, if the output frequency is already at the S0 value. There doesn't appear to be any type of frequency reset occuring as a result of triggering PS0 or PS1. Shouldn't there be one? It does no good to set the DDS output frequency to E0 before entering DRG mode because setting the Auxiliary Accumulator Enable bit forces it to jump back to S0.
Does anybody know if the output frequency jump that happens when changing the Auxiliary Accumulator Enable bit = 1 is an attribute of the AD9913 device or is it caused by the evaluation board software?
If it is an attribute of the AD9913, is there a way of programming the device to jump to E0 instead of S0?
Please advise. Thank you for your help.
Sorry for the late response.
I was able to have access in the lab and was able to do the bench set-up. Indeed, I was able to verify that there is something wrong with the ramp-down mode, no-dwell bit active. One way to check this is if it is indeed caused by the evaluation board software. I will refer this to DSB and will get back to you as soon as possible.
That works! Thanks!
I have the same problem with ramp-down frequencies with the AD9913. However, I am using internal profiles to control the sweeps, rather than the external pins PS and PS. Is there a fix to this problem without using the external pins?
Retrieving data ...