I want synchronize multiple device.
So I had to design the system as follows.
Four DAC is controlled by one FPGA.
(DAC partnumber is AD9788)
FPGA is transmit Sync signal to each DAC a few times, After initializing DAC.
(Sync mode is Pulse mode)
And DAC is transmit DATA CLK to FPGA.
But I can't see synchronized DATA CLK.
Sometimes each DATA CLK is synchronized. But each DATA CLK is almost asynchronous.
What's the problem?
Note that DAC's register setting is below.
0x00 : 0x02
0x01 : 0x0BC1
0x02 : 0x000c
0x03 : 0x84040400
0x04 : 0x88B36C
0x05 : 0x0140
0x06 : 0x0000
0x07 : 0x0140
0x08 : 0x0000
0x09 : 0x0140
0x0c : 0x020100