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Status of ADV7180 HSync output and VSync output during Hardware Reset after power supply

Question asked by Hodaka on Dec 12, 2012
Latest reply on Dec 13, 2012 by Hodaka

Hello,

 

I want to the status of ADV7180 HS pin(HSync output) and VS/FILELD pin(VSync output) during hardware reset after power supply.

 

Therefore, I check the following discussion.

http://ez.analog.com/message/45625#45625

 

There is the following answer in this discussion.

  "All other digital outputs (including the P7:P0 video pixel output port pins) are tri-stated during a reset."

 

By this, I understood, 

HS pin is tri-state and VS/FIELD pin is tri-state during hardware reset after power supply.

 

At one customer,

HS pin and VS/FIELD pin is pull-up by 47kohm register on an evaluation circuit that they made.

 

When they measured each status of HS pin and VS/FILED pin during hardware reset,

It occurred that HS pin is low and VS/FIELD pin is low.

 

"HS pin is tri-state and VS/FIELD pin is tri-state during Hardware Reset after power supply." is wrong ?

 

Please teach a right status of HS pin and VS/FILED pin during hardware reset.

 

Best regards.

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