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AD8145 power-down

Question asked by Walter on Dec 8, 2012
Latest reply on Dec 11, 2012 by jpearson



I want to put the AD8145 into power-down. I use +5V / -5V for power supply.


1.) The datasheet says the AD8145 will enter power-down when the voltage applied to the power-down pin drops to approximately 2 V below the positive supply. I assume it is also ok to pull the input down to 0V.  In other words: what is the allowed input voltage range for the power-down pin?


2.) From the datasheet it is not really clear if a pullup resistor to the positive supply is required on the power-down pin to keep the AD8145 in active state? I plan to use a transistor to pull the input to 0V for power-down. In other words: is open drain/open collector without a pullup sufficient?


3.) The datasheet says it does NOT place the output in a high-Z state when power-down is asserted. What is the state of the outputs during power down? Will they be at 0V or e.g. pulled to the positive or negative supply?


4.) Are the comparators operational during power-down?


Thanks in advance,