I use two AD9739 and hope their outputs be synchronization. The hardware take the connection as Figure 52 one page 35 in datasheet(Rev.B) and there exist only one FPGA. The sample rate is up to 1.6GSPS and output sinesoid signal is 300MHz. I am sure the tracks of DCI and SYNC_IN meet the demand. I have a few questions about this applicaiton. Firslty, wheather I could use the master DAC as slave model? Secondly,I measure the phase difference between the two outputs of DAC. I see that the phase difference is changeing slowly, i.e. it changes 5 degree in one hour. Weather this change is resulted by the temperature? In addition, if I ture off the power and ture on again, then download the FPGA bit stream file ,the phase difference are all the same. However, if I just reset the DAC through the RS pin of the signal, the phase difference are changed. Why? Thanks for your processing for my questions.