it is possible to set the priority of DMA over core on BF609 ??
You can refer to following thread for understanding how to change priority of core/DMAon BF609:
I need only to set the priority of DMA(highest) more than core.
I addd this code but core hang
temp = (2 & BITM_SCB_ARBR_SLAVE) | ((i<<BITP_SCB_ARBR_SLOT) & BITM_SCB_ARBR_SLOT);
*pREG_SCB0_ARBR0 = temp;
temp = (2 & BITM_SCB_ARBW_SLAVE) | ((i<<BITP_SCB_ARBW_SLOT) & BITM_SCB_ARBW_SLOT);
*pREG_SCB0_ARBW0 = temp;
Sorry for replying after so long.
You are modifying the priority for accesses to DDR memory. I guess you execute the above piece of code in a for loop writing all the slots with 2(SCB9: PVP DMAs). Doing so will make the processor hang because if core accesses the DDR memory and since all the slots are assigned to SCB9 and core has no slot and it keeps on waiting for the response from bus and thus processor hangs. I had mentioned it in the original post as:
"In fact all the slots can be assigned to a single master so in that case other masters cannot access the SMC at all but that is not recommended as it can cause a system hang if master with zero slots is one of the Cores. This is because if master does not have a slot and it tries to access the slave then the master will keep on waiting for the response from the fabric (crossbar/arbiter) for the issued read/write access. So in case of Core if no slot is provided and Core access to SMC is done the Core will hang and pipeline won’t move."
So even if you assign most of the slots to DMA, at least one slot should be left for core.
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