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AD9393 Questions

Question asked by T.F. Employee on Nov 29, 2012
Latest reply on Dec 4, 2012 by DaveD



Got some questions regarding AD9393 CLK output : -


- What is the skew between CLK and VSOUT, O/E, DE ? There is a spec (tSKEW) between CLK and DATA but not for the others.

- What level of jitter in CLK expected?

- What degree of phase error expected when 90 deg shifted CLK option is selected by 0x25[7,6]


Thanks in advance, TF