We built a new ADC-board with the AD9268-125 2x16bit differential ADC and an FPGA. The ADC operates with the internal 1V reference voltage at a sampling rate of 125MHz. The data is read out by the FPGA via the LVDS DDR interface.
To measure the inherent ADC noise, we shorted one channel of the ADC and connected it to the ADC's own common mode voltage output (VCM). The grounded input Histogram looks like expected, with a slightly higher rms value than the specified 2.27 in the Datasheet:
We also calculated the power spectral density of the grounded noise, see figure below.
It seems to us that the crossover frequency of the 1/f noise region to the white noise region is very high (around 100kHz), but the datasheet does not specify the amount of inherent 1/f noise.
Has anyone experience with the inherent 1/f noise of highspeed ADCs? Have you measured similar noise spectra?
Where does the 1/f noise come from and how can we reduce it?
Thanks and best regards