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Recommendations for PCIe 3.0 clock generator / Fanout?

Question asked by Wireb on Nov 26, 2012
Latest reply on Nov 27, 2012 by Kyle.Slightom

Looking for a clock tree solution to fill the following requirements:


PCIe 3.0 (would like total jitter due to the generator / fanout to be less than 300fs if possible)

12 HCSL source terminated outputs. (all outputs will be 100MHz PCIe reference clock)

min 2 inputs (one from a fixed oscillator or crystal the other will be a HCSL source terminated input)

spread spectrum support.

prefer a 1 chip solution if possible.


This is part of a custom tester design to fan out either a on card generated reference clock or the clock from the host system.


What would folks suggest I look at to fill this need?