Serial Data Output of PLL devices

Discussion created by rbrennan Employee on Nov 23, 2012
Latest reply on Jul 30, 2013 by rbrennan

ADI PLLs are typically programmed using a three-wire serial interface, where the serial programming data is clocked into an internal shift register and is then latched onto the internal data bus on a rising edge of latch enable (see SPI Programming section in relevant datasheet for more details). To help with chip programming debug a Serial Data Output option has been added to several of the ADI PLLs, including the ADF4153, ADF4154, ADF4156, ADF4157, ADF4158 and ADF4159.


Read more in the attached document.