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ADP1621: Designing slope compensation in buck switching configuration

Question asked by markm Employee on Nov 19, 2012
Latest reply on Nov 20, 2012 by LucaV

First of all, I want to make it sure if ADP1621 can drive buck configuration because it is stated in the datasheet of ADP1621 that it can be used for SEPIC, flyback, boost, buck-boost, forward and "other converter topologies".


Second, I am just wondering on how the slope compensation, current sense amplifier and error amplifier affect the generation of PWM signal. Can you thoroughly explain to me the generation of PWM in the block diagram of ADP1621?


Third, if the ADP1621 is possible to drive buck configuration, I have a problem on how to design the Rs and Rcs values. In my design, I have Vin = 30 V, I(load) = 2A and a variable Vout up to 25 V. In the ADP1621 datasheet, it only shows on how to design the Rs and Rcs in boost configuration. It is also stated in application info the range /limits of the Rs. Is this limit applicable to any regulator topologies? Can you explain to me on how this Rs derives in both boost and buck configurations and how this value affects the response of the whole system of ADP1621 and the current limits  by explaining to me the internal block diagram of ADP1621? In addition, can you please explain to me the two parameters: COMP zero-current threshold and COMP clamp high voltage


Thanks and Regards,