I need to synchronize two AD9734s such that the two I and Q input words to the two DACs appear at the outputs of the two DACs with the same number of DACCLK cycle delays. I'm assuming, since the DACCLKs are divided by two to produce the DATACLKs, that they will differ in phase by +/- 180 degrees. First of all is the the right assumption? Secondly will the internal LVDS receiver FIFOs in the two DACs have differing DACCLK delays? I'm assuming so. I have the ability to adjust the I and Q data inputs a number of DATACLK cycles relative to each other if need be. However I would need to know the absolute relative delay of the DACs. How can that be achieved?

Is there a preferred method for synchronizing the DATA delays of two AD9734 DACs?

Or is there a Dual DAC that can achieve 1200MSamples/S whereby both I and Q data inputs are operating at 1200MSamps/S? ie no interpolation.

I haven't been able to find one though.

Any help would be much appreciated.

dmac

What kind of signal bandwidth do you need? You might look at the AD9142:

http://www.analog.com/en/digital-to-analog-converters/high-speed-da-converters/ad9142/products/product.html

The DACs are designed to be I/Q DACs and synchronized. There is an NCO and interpolators to enable lower data rates if you need a smaller bandwidth but want the RF output.