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AD8195 DDC direction

Question asked by elodg on Nov 14, 2012
Latest reply on Dec 20, 2012 by DaveD

I am having issues with the AD8195 not passing I2C transfers in the DDC_OUT -> DDC_IN logical direction. In this particular case the schematic looks just like the typical application schematic from the product datasheet (page 16) with an FPGA serving as an HDMI receiver.

When a write transaction is attempted from the FPGA to the EDID EEPROM through the AD8195, the transaction doesn't reach the EEPROM (no slave acknowledge).

With the EEPROM moved to the optional placement position (typical schematic), the transfer is properly acknowledged. I did some scope captures in this case and the AD8195 seems to pass through only the acknowledge bit to the SDA_IN pin (green). The orange channel is the SDA_OUT pin.

Is this an intended behavior and is the optional EEPROM placement the only way to provide write access to the EEPROM from the HDMI receiver side?