When an HDMI / DVI signal is connected to the ADV7842, there are two registers which contain bits indicating the mode - HDMI or DVI.
What is the difference in these two bits and which is the proper bit to use to determine the input mode?
IO map reg 0x65, bit 3 - Raw status signal of HDMI Mode signal
0 - DVI is being received
1 - HDMI is being received
HDMI map reg 0x05, bit 7 - A readback to indicate whether the stream processed by the HDMI core is a DVI or an HDMI stream.
0 - DVI mode detected
1 - HDMI mode detected