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AD9914/15 Serial Mode Information Missing in Rev A DS

Question asked by ro@cxt.dk on Oct 26, 2012
Latest reply on Oct 29, 2012 by DSB

Figure 42 in the AD9915 Rev A datasheet shows a register address of 8 bits and one data byte being clocked into the serial port. The registers are 32 bit and the text explains that all 4 bytes should be clocked in. It is unclear to me which is correct - and if figure 42 is correct, how to access the remaining 3 bytes of the registers.

 

The datasheet talks about MSB/LSB options, which is fine. But MSB has a dual meaning: Most-Significant-BIT and Most-Significant-BYTE. Which one is it? The required bit order for a 32 bit word is not clear from the text and figures.

 

The pin table for pin 82 SYNC_CLK states "Many of the digital inputs on the chip, such as IO_UPDATE, PS[2:0], and the parallel data port (D0 to D31), must be set up on the rising edge of this signal."

It is unclear exactly what other signals "such as" is referring to. A complete list of signals, that must be externally synchronized to the chip, is most wanted.

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