I've been testing the ADF4350 in a receiver application, and I'm fighting spurious outputs that are related to the PFD frequency. I am using an 8 MHz PFD frequency, and I notice very high order harmonics of 8 MHz that fall at the IF of my receiver, which is at least 500 MHz removed from the synthesizer. The levels are on the order of -90 dBm, which is high enough to cause problems in my design. I notice that these spurs are dependent on how the PLL settles, and there is as much as 10 dB variation in the levels when re-tuning the PLL to the same frequency. I also notice that using the 4/5 prescaler (rather than the 8/9) reduces these spurs somewhat, as does choosing a fractional-n rather than integer-n divider. I am operating in the 2000-3000 MHz range. If I lower the PFD freqeuncy the spurious go down accordingly, which seems to track with the reduced higher-order harmonic energy.
Is this behaivor inherent to the design of the ADF4350? If it is, would I expect the same issue with the ADF4351, or is that design improved?
Any help or insight would be appreciated!!