I am having a bit of a mystery when loading SW to SDRAM using emulator. I am using a custom device with BF537 and I have made sure that all the necessary registers (EBIU_AMBCTL0, EBIU_AMBCTL1, EBIU_AMGCTL, EBIU_SDGCTL, EBIU_SDRRC and EBIU_SDBCTL) are properly initialized in custom board .xml file. There is also a special register at memory address 0x20300000 where a certain bit needs to be set to activate ClockEnable signal to SDRAM X1. I have also added that setting to the .xml file.
The mystery here is that the software is actually properly loaded with the above mentioned settings both with or without the write to 0x20300000. However the content of the SDRAM memory (viewed from VisualDSP++ memory window) is incorrect but when I manually set the clock enable bit at 0x20300000 the memory window starts showing the valid data.
So the question is: Does the emulator carry out some sort of memory writes to addresses such as 0x20300000 during loading of the .dxe file thus somehow enabling our SDRAM and allowing the code to be loaded into it?
0x20300000 is defined as ROM in .ldf file.