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ADCLK944 + PLL

Question asked by jur4ik on Oct 17, 2012
Latest reply on Nov 9, 2012 by jur4ik

Hello,

 

For my project i need a clock generator which has an low jitter(up to 100 fs) on the one hand and a frequency range from 500 MHz to 1800 MHz on the other hand. I need the clock generator for ADC, DAC and FPGA. I think about ADCLK944 as an clock distributor and need an PLL for genererating a suitable clock. ADCLK944 has an suitable frequency range and also the jitter is good.

My question is: can i use for an example ADF4360-7 as an generator with ADCLK944 to achive my demanded requirements? Which frequencies are allowed for the ADCLK944 to achieve the 50 fs according to data sheet? Has the ADCLK944 an jitter cleaner so i could use an PLL with a worse jitter?

 

Thanks you for your help!

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