I have a design with an ADV7180 64pin which is connected to an FPGA. I have the ability to connect CVBS data to all 6 inputs. At the moment I have input on AIN6. So I have set register 0x00 to 0x05 to configure the input. I can read the value back so I know it is set. I also have read the status inputs which detect the PAL video and say that it is locked. The problem is that I am not getting any data out on the 8-bit bus. I can see the clock and the FVH syncs, but the video lines are all low. Is there something else that I need to do?