I am having an AD9517-3 clock generator interfaced to a Xilinx FPGA through SPI interface on my board. We are not able to write any data to the chip using standard SPI protocol. Also we are unable to read any data from the device too. Our inference is that the setting of SPI interface from 3-wire mode to 4-wire mode itself is not happening with the device. Can anyone suggest what we are doing wrong with the device?
Thanks & Regards,