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LVDS buffers in High speed ADCs

Question asked by FHC on Oct 2, 2012
Latest reply on Oct 2, 2012 by UmeshJ

Hello Guys

 

We are designing an ADC FMC card with 4 channels. We intend to prototype two boards, with two different converters, one running at maximum 130 MSPS and other with maximum 250 MSPS, both are16 bits ADC´s. These boards will be attached to an AMC standard processing board, with FPGA.

 

My questions is: I read some topics on the internet about the recomendation to use buffers in the ADC´s digital outputs to get best performance on ADCs. We know that CMOS output is not suitable for long path BUS and also we need to minmize the capacitance on the digital traces to reduce voltage peaks, and so on. It´s necessary to use buffers/drivers/repeaters also for LVDS signaling?

 

Are there rules to routing the digital traces on high speed ADC´s like AD9467? whats the recomendation for FMC standard using LVDS signals?

 

thank you very much!

 

Regards

 

Fernando Henrique Cardoso

fcardoso@lnls.br

+55-19-82156023

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