I'm using the ADAU1701 DSP with Sigma Studio IDE. I'm having issues with it working sometimes and then not.
My question to start is pertaining the datasheet. It shows on the application schematic DVDD being feed by ~1.8VDC through a transisitor feediing DVDD on the chip... this is clear and also the electrical spec of what DVDD is clear. Whats NOT clear is that the schematic shows EVERYTHING being feed by DVDD. This makes NO sense at all and is VERY confusing. This is a rev B datasheet. I can conclude that IOVDD and PVDD and AVDD are ok on my 3.3V rail. Since the core is operating with the 1.8V DVDD, I cannot determine what PLL_MODE0 and PLLMODE1, PLL_LF decouling caps, SELFBOOT, Vcc on the EEPROM etc need.
Please clarifiy where DVDD should be used and how its used in this schematic.
Thanks for your help.