I am currently designing a frontend with the AD9650 as ADC. Due to the application, there can be interfering signals which are higher than the absolut maximum voltage of ADC for a short time. Recommended drivers like the ADL5562 can have a higher output voltage swing than the max. input level of the ADC. In order to not destroy the ADC, a limiter is needed. Has anybody an idea how to design a limiter that not decreases the dynamic behaviour of the ADC?