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DMA and Instruction Cache

Question asked by MartyP on Sep 25, 2012
Latest reply on Sep 26, 2012 by CraigG



We are currently setting up a BF512 to do both AAC and MPEG audio decoding using the ADI provided modules.  Data and instruction caches are enabled and SPORT0 and SPORT1 are operating with DMA.  We are having problems when DMA interrupts (generated by SPORT Tx) try to use code in external SDRAM.  We get a cplb_miss_without_replacement fault when ProcessDataInterrupt(ADI_DMA_CHANNEL*, u32) is called.  When I get the fault, the ICPLB_FAULT_ADDR is an address in bank 3 of our external SDRAM, specifically an adi_dma.doj object.  I've also tried making that section no_cache in the cplb tables and I'm getting the same error.  Do DMA interrupts work if the code is called in external SDRAM?  Does DMA work with instruction cache if it is using code stored in external memory?


Thanks for any help,