In the AD9788 datasheet, it is mentioned in "DAC REFCLK Configuration" section that the PLL multiplier can be used if Refclk is operating at the data input frequency. If Refclk is equal to Data frequency, why should we use the PLL multiplier. In other DACs like AD9781, internal PLL is not used. In this case, should the reference clock be higher than Data input frequency? Also, I could'nt understand the difference between DACCLK and REFCLK. Please explain.